Show HN: We built an 8-bit CPU as 2nd year EE students

Category: other

Tags: 8-bit-cpu, hardwired-control, logisim-simulation

Score: 6.5/10 (Innovation: 6, Technical: 7, Documentation: 9, Utility: 4)

STEPLA-1 is an open-source 8-bit Harvard architecture CPU designed entirely from individual logic gates and simulated in Logisim-Evolution, with a fully hardwired control unit and no black-box components. It stands out for its educational rigor, transparency, and detailed 43-page specification, making it a unique learning tool for digital logic and CPU design. The project bridges the gap between theoretical HDL simulation and physical breadboard construction, though its niche appeal limits broad utility.

Target audience: computer engineering students, hobbyists, educators

Repository: https://github.com/c0rRupT9/STEPLA-1 · Python · MIT · 10 stars

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